Papers - Matsutani, Hiroki
-
Adaptive body bias control scheme for ultra low-power network-on-chip systems
Ben Ahmed A., Okuhara H., Matsutani H., Koibuchi M., Amano H.
Proceedings - 2018 IEEE 12th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018 (Proceedings - 2018 IEEE 12th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018) 146 - 153 2018.11
ISSN 9781538666890
-
AxNoC: Low-power Approximate Network-on-Chips using Critical-Path Isolation
Akram Ben Ahmed, Daichi Fujiki, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano
International Symposium on Networks-on-Chip (NOCS'18) (2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018) 1 - 8 2018.10
Research paper (international conference proceedings), Joint Work, Accepted, ISSN 9781538648933
-
Proxy responses by FPGA-based switch for MapReduce stragglers
Mitsuzuka K., Koibuchi M., Amano H., Matsutani H.
IEICE Transactions on Information and Systems (IEICE Transactions on Information and Systems) E101D ( 9 ) 2258 - 2268 2018.09
ISSN 09168532
-
Accelerating Blockchain Search of Full Nodes Using GPUs
Morishima S., Matsutani H.
Proceedings - 26th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2018 (Proceedings - 26th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2018) 244 - 248 2018.06
ISSN 9781538649756
-
Special session on bringing cores closer together: The wireless revolution in on-chip communication
Mak T., Matsutani H., Pande P.P.
Proceedings of the IEEE VLSI Test Symposium (Proceedings of the IEEE VLSI Test Symposium) 2018-April 2018.05
ISSN 9781538637746
-
Building block multi-chip systems using inductive coupling through chip interface
Amano H., Kuroda T., Nakamura H., Usami K., Kondo M., Matsutani H., Namiki M.
Proceedings - International SoC Design Conference 2017, ISOCC 2017 (Proceedings - International SoC Design Conference 2017, ISOCC 2017) 152 - 154 2018.05
ISSN 9781538622858
-
A hardware-based caching system on FPGA NIC for Blockchain
Sakakibara Y., Morishima S., Nakamura K., Matsutani H.
IEICE Transactions on Information and Systems (IEICE Transactions on Information and Systems) E101D ( 5 ) 1350 - 1360 2018.05
ISSN 09168532
-
High-Performance with an In-GPU Graph Database Cache
Shin Morishima, Hiroki Matsutani
IEEE IT Professional 19 ( 6 ) 58 - 64 2017.12
Research paper (scientific journal), Joint Work, Accepted
-
HiRy: An Advanced Theory on Design of Deadlock-free Adaptive Routing for Arbitrary Topologies
Ryuta Kawano, Ryota Yasudo, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano
International Conference on Parallel and Distributed Systems (ICPADS'17) (Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS) 2017-December 664 - 673 2017.12
Research paper (international conference proceedings), Joint Work, Accepted, ISSN 9781538621295
-
Multilevel NoSQL Cache Combining In-NIC and In-Kernel Approaches
Yuta Tokusashi, Hiroki Matsutani
IEEE Micro 37 ( 5 ) 44 - 51 2017.10
Research paper (scientific journal), Joint Work, Accepted
-
A Case for Uni-Directional Network Topologies in Large-Scale Clusters
Michihiro Koibuchi, Tomohiro Totoki, Hiroki Matsutani, Hideharu Amano, Fabien Chaix, Ikki Fujiwara, Henri Casanova
International Conference on Cluster Computing (Cluster'17) 178 - 187 2017.09
Research paper (international conference proceedings), Joint Work, Accepted
-
Order/Radix Problem: Towards Low End-to-End Latency Interconnection Networks
Ryota Yasudo, Michihiro Koibuchi, Koji Nakano, Hiroki Matsutani, Hideharu Amano
International Conference on Parallel Processing (ICPP'17) 322 - 331 2017.08
Research paper (international conference proceedings), Joint Work, Accepted
-
Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers
Ryota Yasudo, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tadao Nakamura
IEEE Transactions on Computers (TC) 66 ( 4 ) 702 - 716 2017.04
Research paper (scientific journal), Joint Work, Accepted
-
An FPGA-Based In-NIC Cache Approach for Lazy Learning Outlier Filtering
Ami Hayashi, Hiroki Matsutani
International Conference on Parallel, Distributed, and Network-Based Processing (PDP'17) 15 - 22 2017.03
Research paper (international conference proceedings), Joint Work, Accepted
-
High-Bandwidth Low-Latency Approximate Interconnection Networks
Daichi Fujiki, Kiyo Ishii, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Henri Casanova, Michihiro Koibuchi
IEEE International Symposium on High-Performance Computer Architecture (HPCA'17) 469 - 480 2017.02
Research paper (international conference proceedings), Joint Work, Accepted
-
Accelerating Spark RDD Operations with Local and Remote GPU Devices
Yasuhiro Ohno, Shin Morishima, Hiroki Matsutani
International Conference on Parallel and Distributed Systems (ICPADS'16) 791 - 799 2016.12
Research paper (international conference proceedings), Joint Work, Accepted
-
Randomly Optimized Grid Graph for Low-Latency Interconnection Networks
Koji Nakano, Daisuke Takafuji, Satoshi Fujita, Hiroki Matsutani, Ikki Fujiwara, Michihiro Koibuchi
International Conference on Parallel Processing (ICPP'16) 340 - 349 2016.08
Research paper (international conference proceedings), Joint Work, Accepted
-
A Multilevel NOSQL Cache Design Combining In-NIC and In-Kernel Caches
Yuta Tokusashi, Hiroki Matsutani
IEEE International Symposium on High Performance Interconnects (Hot Interconnects 24) 60 - 67 2016.08
Research paper (international conference proceedings), Joint Work, Accepted
-
Randomizing Packet Memory Networks for Low-latency Processor-memory Communication
Daichi Fujiki, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi
International Conference on Parallel, Distributed, and Network-Based Processing (PDP'16) 168 - 175 2016.02
Research paper (international conference proceedings), Joint Work, Accepted
-
Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces
Takahiro Kagami, Hiroki Matsutani, Michihiro Koibuchi, Yasuhiro Take, Tadahiro Kuroda, Hideharu Amano
IEEE Transactions on Very Large Scale Integration Systems (TVLSI) 24 ( 2 ) 493 - 506 2016.02
Research paper (scientific journal), Joint Work, Accepted