Papers - Matsutani, Hiroki
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A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface
Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani
ACM SIGARCH Computer Architecture News (CAN) 43 ( 4 ) 22 - 27 2015.09
Research paper (scientific journal), Joint Work, Accepted
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On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck
Ryota Yasudo, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tadao Nakamura
ACM/IEEE International Symposium on Networks-on-Chip (NOCS'15) 16:1 - 16:8 2015.09
Research paper (international conference proceedings), Joint Work, Accepted
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Swap-and-randomize: A Method for Building Low-latency HPC Interconnects
Ikki Fujiwara, Michihiro Koibuchi, Hiroki Matsutani, Henri Casanova
IEEE Transactions on Parallel and Distributed Systems (TPDS) 26 ( 7 ) 2051 - 2060 2015.07
Research paper (scientific journal), Joint Work, Accepted
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Augmenting Low-latency HPC Network with Free-space Optical Links
Ikki Fujiwara, Michihiro Koibuchi, Tomoya Ozaki, Hiroki Matsutani, Henri Casanova
IEEE International Symposium on High-Performance Computer Architecture (HPCA'15) 390 - 401 2015.02
Research paper (international conference proceedings), Joint Work, Accepted
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Performance Evaluations of Graph Database using CUDA and OpenMP-Compatible Libraries
Shin Morishima, Hiroki Matsutani
ACM SIGARCH Computer Architecture News (CAN) 42 ( 4 ) 75 - 80 2014.09
Research paper (scientific journal), Joint Work, Accepted
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Skywalk: a Topology for HPC Networks with Low-delay Switches
Ikki Fujiwara, Michihiro Koibuchi, Hiroki Matsutani, Henri Casanova
IEEE International Parallel and Distributed Processing Symposium (IPDPS'14) 263 - 272 2014.05
Research paper (international conference proceedings), Joint Work, Accepted
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Low-Latency Wireless 3D NoCs via Randomized Shortcut Chips
Hiroki Matsutani, Michihiro Koibuchi, Ikki Fujiwara, Takahiro Kagami, Yasuhiro Take, Tadahiro Kuroda, Paul Bogdan, Radu Marculescu, Hideharu Amano
Design, Automation, and Test in Europe Conference (DATE'14) 1 - 6 2014.03
Research paper (international conference proceedings), Joint Work, Accepted
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3-D NoC with Inductive-Coupling Links for Building-Block SiPs
Yasuhiro Take, Hiroki Matsutani, Daisuke Sasaki, Michihiro Koibuchi, Tadahiro Kuroda, Hideharu Amano
IEEE Transactions on Computers (TC) 63 ( 3 ) 748 - 763 2014.03
Research paper (scientific journal), Joint Work, Accepted
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A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface
Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
IEEE Micro 33 ( 6 ) 6 - 15 2013.12
Research paper (scientific journal), Joint Work, Accepted
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Headfirst Sliding Routing: A Time-Based Routing Scheme for Bus-NoC Hybrid 3-D Architecture
Takahiro Kagami, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano
ACM/IEEE International Symposium on Networks-on-Chip (NOCS'13) 29 - 36 2013.04
Research paper (international conference proceedings), Joint Work, Accepted
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Layout-conscious Random Topologies for HPC Off-chip Interconnects
Michihiro Koibuchi, Ikki Fujiwara, Hiroki Matsutani, Henri Casanova
IEEE International Symposium on High-Performance Computer Architecture (HPCA'13) 484 - 495 2013.02
Research paper (international conference proceedings), Joint Work, Accepted
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A Case for Wireless 3D NoCs for CMPs
Hiroki Matsutani, Paul Bogdan, Radu Marculescu, Yasuhiro Take, Daisuke Sasaki, Hao Zhang, Michihiro Koibuchi, Tadahiro Kuroda, Hideharu Amano
Asia and South Pacific Design Automation Conference (ASP-DAC'13) 23 - 28 2013.01
Research paper (international conference proceedings), Joint Work, Accepted
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Dependable Responsive Multithreaded Processor for Distributed Real-Time Systems
Kazutoshi Suito, Rikuhei Ueda, Kei Fujii, Takuma Kogo, Hiroki Matsutani, Nobuyuki Yamasaki
IEEE Micro 32 ( 6 ) 52 - 61 2012.12
Research paper (scientific journal), Joint Work, Accepted
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A Case for Random Shortcut Topologies for HPC Interconnects
Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, D. Frank Hsu, Henri Casanova
ACM/IEEE International Symposium on Computer Architecture (ISCA'12) 177 - 188 2012.06
Research paper (international conference proceedings), Joint Work, Accepted
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A Multi-Vdd Dynamic Variable-Pipeline On-Chip Router for CMPs
Hiroki Matsutani, Yuto Hirata, Michihiro Koibuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano
Asia and South Pacific Design Automation Conference (ASP-DAC'12) 407 - 412 2012.01
Research paper (international conference proceedings), Joint Work, Accepted
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Prediction Router: A Low-Latency On-Chip Router Architecture with Multiple Predictors
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga
IEEE Transactions on Computers (TC) 60 ( 6 ) 783 - 799 2011.06
Research paper (scientific journal), Joint Work, Accepted
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A Vertical Bubble Flow Network using Inductive-Coupling for 3-D CMPs
Hiroki Matsutani, Yasuhiro Take, Daisuke Sasaki, Masayuki Kimura, Yuki Ono, Yukinori Nishiyama, Michihiro Koibuchi, Tadahiro Kuroda, Hideharu Amano
ACM/IEEE International Symposium on Networks-on-Chip (NOCS'11) 49 - 56 2011.05
Research paper (international conference proceedings), Joint Work, Accepted
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Performance, Area, and Power Evaluations of Ultrafine-Grained Run-Time Power-Gating Routers for CMPs
Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 30 ( 4 ) 520 - 533 2011.04
Research paper (scientific journal), Joint Work, Accepted
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Ultra Fine-Grained Run-Time Power Gating of On-Chip Routers for CMPs
Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano
ACM/IEEE International Symposium on Networks-on-Chip (NOCS'10) 61 - 68 2010.05
Research paper (international conference proceedings), Joint Work, Accepted
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MuCCRA-Cube: a 3D Dynamically Reconfigurable Processor with Inductive-Coupling Link
Shotaro Saito, Yoshinori Kohama, Yasufumi Sugimori, Yohei Hasegawa, Hiroki Matsutani, Toru Sano, Kazutaka Kasuga, Yoichi Yoshida, Kiichi Niitsu, Noriyuki Miura, Tadahiro Kuroda, Hideharu Amano
International Conference on Field Programmable Logic and Applications (FPL'09) 6 - 11 2009.09
Research paper (international conference proceedings), Joint Work, Accepted